Description: Salary Verbias for San Jose, CA: GlobalLogic estimates the starting pay range for this role to be performed within the USA to be $135K to $155K and reflects base salary only and does not include additional performance-linked variable ...
a day ago
Description: Position: PCIe Validation Engineer Location: San Diego, CA Exp: 5-8 years PCIe Gen 4/5/6, CXL ... Take lead responsibility for validating PCIe and its subsystems on multiple ...
9 days ago
Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, RISC-V, ARM, Oscilloscope, ... Take lead responsibility for validating PCIe and its subsystems on multiple ...
16 days ago
Description: Job Title: Design Verification Engineer Location: CA Experience Level: ... We are seeking a skilled Design Verification Engineer with strong expertise in System ... or Design IPs into the verification environment. Responsibilities: Develop, enhance, ...
17 days ago
... looking for a FPGA Verification Engineer. Role:: FPGA Verification Engineer Location: Mountain View, ... System Verilog and UVM verification methodology. Experience with industry ... -standard verification tools (e.g., QuestaSim, Synopsys ...
16 days ago
Description: Position: FPGA Verification Engineer Location: Mountain View, CA (On- ... in System Verilog and UVM verification methodology Skill 3 Experience in FPGA ... verification Good To have Skills Skill 1 ...
11 days ago
... Our Team as a ASIC/FPGA Verification Engineer where you will work on ...
21 days ago
... :Drive the pre-silicon verification of next-generation PCIe Switch and Retimer ...
23 hours ago
Description: ResponsibilitiesOwn verification of entire FPGA design ... and interact with design engineers to identify verification scenariosCreate test plans, constrained ... -random verification environments, test cases, regressions, and ...
17 days ago
Description: PCB HW Validation Engineer We are seeking an experienced ... PCB Hardware Validation Engineer to validate printed circuit board ... subsystems, including PCIe and I2C. Scope: Perform PCB functional verification to confirm ...
10 days ago
Description: Hi, Role: Firmware Validation Engineer (System Level) Location: Santa Clara, ... + Must Have Skills Firmware Validation Engineer Skill 1 10 + Years of exp ... high-speed interfaces such as PCIe, UART, and UMA.
2 days ago
... for an experienced Principal Hardware Engineer to lead complex PCB and ... with high-speed interfaces like PCIe, DDR, USB, Ethernet Collaborate with ...
22 hours ago
... & Power Integrity Engineer to support high-speed interfaces (LPDDR5X, PCIe Gen7, UCIe ...
8 days ago
... Linux, RTOS); high-speed interfaces (PCIe and Ethernet); memory technologies: DDR3 ...
30 days ago
Description: Software Engineer-Test & Verification Company: The Boeing Company The ... is currently seeking Experienced Software Engineers-Test & Verification to support our Experimental ... (ESG) Flight Software (FSW) Test & Verification team located in Seal Beach ...
23 days ago
... Test Engineer will be responsible for developing and maintaining system verification and ... have influence on the system verification and validation. Work with various ...
a day ago
Description: Job Title Verification and Validation ADAS Engineer Job Location Palo Alto, CA ...
3 days ago
... Test Engineer will be responsible for developing and maintaining system verification and ... have influence on the system verification and validation. Work with various ...
6 days ago
... , timing closure, proficient in physical verification and other signoff checks with ... resolve issues wrt constraints validation, verification, STA, Physical design, etc.Partner ...
8 days ago
... Test Engineer will be responsible for developing and maintaining system verification and ... have influence on the system verification and validation. Work with various ...
9 days ago