Description: Job Title : FPGA Verification Engineer Santa Clara, CA- 5 days onsite ... seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team ... closely with design engineers to develop and execute verification plans, identify ...
7 days ago
Description: FPGA Verification EngineerMountain View, CA (On-Site) ... System Verilog and UVM verification methodologySkill 3 Experience in FPGA verification Good To have ...
13 days ago
... USD Hourly Description: Job Title: FPGA Design/Verification Engineer Duration: 6+ Months (Possible Extension ... ASIC & FPGA verification on R&D program. This engineer will be a verification UVM expert. This engineer with ...
22 days ago
Description: Job Title: RTL / FPGA Design EngineerLocation: San Jose, CA( ... seeking an experienced RTL / FPGA Design Engineer with strong hands-on expertise ... in FPGA design, simulation, synthesis, and ...
16 days ago
... (Hybrid) Project descriptionThe Principal Design Verification Engineer, within the NPU Hardware & ... a broad background in design verification and complex digital system validation ... experience in AI accelerator verification and automotive safety standards. ...
7 days ago
... Project Description: The Principal Design Verification Engineer, within the NPU Hardware & ... broad background in design verification and complex digital system validation ... experience in AI accelerator verification and automotive safety standards. ...
8 days ago
Description: Job Title: GPU Design Verification Engineer Location: San Jose, CA (Onsite) ... are seeking a highly skilled Design Verification Engineer to join our team at ... be on developing and executing verification plans, creating testbenches, and debugging ...
21 days ago
... are seeking a highly skilled Design Verification Engineer to join our team.The ... be on developing and executing verification plans, creating testbenches, and debugging ... . Responsibilities Develop and execute comprehensive verification plans for GPU
22 days ago
Description: Role: PCIe Verification Engineer Position Type: Contract Location: San ... Summary: Drive the pre-silicon verification of next-generation PCIe Switch ...
a day ago
... The ASIC Engineer is responsible for designing ASIC and FPGA used in ... for supporting our ASIC/FPGA development effort including FPGA synthesis, Timing constraints ... , ASIC backend support, FPGA low level tests on prototyping ...
9 days ago
... to build scalable and reusable verification components.Analyze and improve code ... coverage metrics to ensure thorough verification.Write and maintain scripts (e.g., Python ... , Perl, Tcl) to automate verification flows and data
21 days ago
Description: JD Digital DV within a mixed signal chip (ADC), Digital based simulation environment, Test bench not required, it is available already, Test cases to be developed. No need to develop models, Develop test plan etc.. System Verilog, Unix/Linux, ...
a day ago
Description: Job Title: FPGA/Design Verification Engineer Location: Mountain View, CA (Onsite) ... FPGA design principles and architectures. Proficiency in System Verilog and UVM verification ...
a month ago
Description: Position: FPGA Verification Contractor Location: San Jose, CA ( ... Job Description & Responsibilities Own verification of theentire FPGA designused inhigh-end router ...
16 days ago
Description: Position: Principal Engineer, Design Verification (NPU) Location: Mountain View ... Project description The Principal Design Verification Engineer, within the NPU Hardware ... experience in AI accelerator verification and automotive safety standards. ...
7 days ago
Description: Title: Principal Engineer, Design Verification (NPU) Location: Mountain View, ... Project Description: The Principal Design Verification Engineer, within the NPU Hardware & ... experience in AI accelerator verification and automotive safety standards. ...
3 days ago
... Description: Project descriptionThe Principal Design Verification Engineer, within the NPU Hardware & ... broad background in design verification and complex digital system validation ... experience in AI accelerator verification and automotive safety standards. ...
7 days ago
... IP is hiring for a Verification Engineer to join their high-performance ... team! Responsibilities include: - Developing verification environments using System Verilog and ... UVM - Designing verification components and behavioral models - ...
16 days ago
Description: Job Title: FPGA Engineer Location: California, USA Experience: 6 9 ... Description: We are seeking experienced FPGA Engineers to design, develop, and ... / VHDLImplement, test, and debug FPGA designs on hardwarePerform simulation, verification, and v
13 days ago
... The ASIC Engineer is responsible for designing ASIC and FPGA used in ... for supporting our ASIC/FPGA development effort including FPGA synthesis, Timing constraints ... , ASIC backend support, FPGA low level tests on prototyping ...
14 days ago
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