Description: Job Title: SoC Lead Engineer Location: San Jose, CA Company: ... Experience: 5 8 years Key Responsibilities: Define SoC architecture and microarchitecture for multi ... clock/reset architectures.Collaborate with verification teams for test planning and ...
8 days ago
Description: Job Title - Design Verification Engineer (GPU) Duration 6+ Months Location: San ... , CA Description As a GPU Design Verification Engineer, your talents will ensure the ... of state-of-the-art verification techniques including the most up ...
8 days ago
Description: Job Title - Design Verification Engineer (GPU) Duration 9 + Month (With the ... w2 Description As a GPU Design Verification Engineer, your talents will ensure the ... of state-of-the-art verification techniques including th
8 days ago
Description: Job Title:- ASIC Design Verification Engineer Duration:-12 months+ Location:-San ... skilled and motivated ASIC Design Verification Engineer with over 6 years of experience ... in the field of verification. As an Individual Contributor, ...
22 days ago
Description: Principal Design Verification Engineer A leading chip and silicon IP ... hire an outstanding Principal Design Verification Engineer to join its Memory Interface ... data security. As a Principal Design Verification Engineer, you ll play a critical role ...
18 days ago
... Title: Power Estimation & Low Power Verification Engineer Location: San Jose, CA Job ... experienced Power Estimation & Low Power Verification Engineer to work with our team ...
a day ago
... looking to hire a talented Principal Verification Engineer to join its Memory Interconnect ... some of the industry's top engineers to help develop cutting-edge ... full-time role, the Principal Verification Engineer will report to the Director ...
18 days ago
Description: Position: 1- Firmware Engineer C, C++ microcontrollers, UART, I2C, SPI, USB, SoC, RTOS, Microcontrollers, Debugging ... : 2- Validation Engineer VHDL, Verilog, Hardware Description Languages (HDL), UVM (Universal Verification Methodology ...
13 days ago
... Title: Power & Performance (PnP) Validation Engineer Location: San Jose, CA Company ... Key Responsibilities: Validate ARM-based SoC designs focusing on power, performance ... test cases for RTL/firmware verification in ASIC/FPGA environments.Key ...
2 days ago
... Doing: Map multi-million gate SoC designs onto prototyping platforms, creating ... .Collaborate with Software, Design, and Verification teams to validate the functional ...
6 days ago
Description: Position: Senior ASIC Design Engineer Location: San Jose, CA (Complete ... Doing: Map multi-million gate SoC designs onto prototyping platforms, creating ...
7 days ago
Description: Position: Senior ASIC Design Engineer Emulation(HAPS Engineer) Location: San Jose, CA ... Doing: Map multi-million gate SoC designs onto prototyping platforms, creating ...
11 days ago
Description: Job Role: Test Engineer Location: San Jose, CA Job ... Electrical Engineering.8+ years experience in SOC/VLSI/ bring-up, production and ...
11 days ago
Description: Job Title: Senior Hardware Engineer / Product Engineer Location: San Jose, CA Type ... /Functional Skills Strong background in SOC/VLSI/Mixed Signal IC bring ...
11 days ago
Description: Role : EDVT Engineer Location: San Jose, CA (Onsite ... expr , in Hardware Testing with Verification expr. With Python and pearl ...
19 days ago
... Participates on a project team of engineers involved in the specification, design ... complex system level problems.This engineer will work closely with ... hardware design engineers, software/diagnostic engineers, and manufacturing test engineers to determine ...
15 days ago
... : Chip-Level Timing Constraint Development Engineer Location: San Jose, CA Onsite ... a Chip-Level Timing Constraint Development Engineer, you will be responsible for ... RTL designers, physical design engineers, and verification teams, to ensure robust timing ...
26 days ago