... , RTL design principles and architecturesProficiency in System Verilog and UVM verification methodologyExperience ... -standard verification tools (e.g., QuestaSim, Synopsys VCS, Haps)Experience with high-speed I/O design ...
19 days ago
Description: Role: Silicon Design Package Engineer Location: Hybrid (Santa Clara, CA ... highly specialized in semiconductor packaging design, requiring strong EDA tool ... Expertise: Multi-layer package design experience. Understanding of substrate manufacturing ...
9 days ago
Description: Role: Silicon Design Package Engineer Location:Santa Clara, CA ... highly specialized in semiconductor packaging design, requiring strong EDA tool ... Technical Expertise: Multi-layer package design experience. Understanding of substrate manufacturing ...
27 days ago
... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation. Develop forward ...
22 days ago
... Verification Exp Strong SystemVerilog coding (Universal Verification Methodology)-UVM 5+ years of FPGA verification ... with UVM (Universal Verification Methodology)Familiarity with industry ... -standard verification tools (e.g., QuestaSim, ...
29 days ago
Description: Job Title: Mechanical Design Engineer 2 Position Description: Protingent Staffing has ... an exciting contract Mechanical Design Engineer 2 opportunity with our client ... CA. Job Description: As Mechanical Engineer in the Vision Equipment team ...
27 days ago
... : Position Title: AMS CAD/Analog Engineer Location: Santa Clara, CA Job ... PythonProficient in using industry-standard design software, including Cadence Virtuoso, Cadence ... working with analog and digital design flowsExcellent communication skills and ability ...
a day ago
Description: Position : Generative AI (GenAI) Design Engineer (Contract) Location : Santa Clara, CA ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation. Develop ...
20 days ago
Description: Position : Generative AI (GenAI) Design Engineer (Contract) Location : Santa Clara, CA ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation. Develop ...
22 days ago
Description: Position : Generative AI (GenAI) Design Engineer (Contract) Location : Santa Clara, CA ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation. Develop ...
26 days ago
Description: Role: Network Support Engineer Location Santa Clara, CA - Onsite ( ... Hybrid DC Network Architecture & Fabric Design Job Description/Responsibilities: This is ... position focused on the architecture, design, development and deployment of ultra ...
14 days ago
... position is for a Network Integration Engineer who will be responsible for ... 6, 802.11ax/ac/n, and RF design principles. They will also have ... from start to finish. Responsibilities:Design and implement wireless network solutionsLe
22 days ago
Description: Job Title: Network Integration Engineer Location: Santa Clara CA - Onsite ... , specializing in wireless network design and implementationExtensive knowledge of wireless ... 802.11ax/ac/n, and RF design principlesProven ability to lead large ...
22 days ago
... models for materials discovery and design. - Aggregate, process, and quality-control ... data for modeling and analysis. - Design, optimize, and maintain scalable data ... teams (materials scientists, chemists, software engineers) to integrate predi
26 days ago
... highly specialized in semiconductor packaging design, requiring strong EDA tool ... Technical Expertise:Multi-layer package design experience.Understanding of substrate manufacturing ... design rules and assembly rules. ...
27 days ago
... Responsibilities Experience with 2.5D package design and development like CoWoSStrong expertise ... Cadence APD Understanding IC package design requirements for high speed interfaces ...
19 hours ago
Description: Senior Wireless Network Engineer Senior Wireless Network Engineer The Network Support team ... a highly experienced Senior Wireless Network Engineer to design, operate, and continuously improve ...
a day ago
... : We are hiring for Data Engineer with Databricks Experience at Santa ... , CA (Onsite). Job Title: Data Engineer with Databricks Experience Location: - Santa ... catalog-driven approaches).Understand and design agentic workflows for data and ...
9 days ago
Description: Job Title: ASIC Engineer Location: Santa Clara, CA, 95051 ... and experience to define, model, design (digital and/or analog), optimize ... advanced architectures, circuit specifications, logic designs, and/or system simulations based ...
14 days ago
... the environment.Senior Wireless Network Engineer The Network Support team is ... a highly experienced Senior Wireless Network Engineer to design, operate, and continuously improve ...
16 days ago
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