... are looking for RTL Design Engineer - Specialized for our client ... CA Job Title: RTL Design Engineer - Specialized Job Location: ... Analog-Mixed Signal RTL Design Engineer will be responsible for ... running quality checks, debugging design issues, and providing ...
20 days ago
Description: USB Systems Design Engineer The job is 100% onsite ... use scopes. As a USB Systems Design Engineer, you will be developing, executing ...
27 days ago
... are looking for a USB Systems Design Engineer for our client in Santa ... , CA Job Title: USB Systems Design Engineer Job Location: Santa Clara, CA ... .11hr - $76.74hrThe SOC Validation Engineer will be responsible for driving ...
28 days ago
... experienced FPGA Verification Engineer to verify complex FPGA designs. You will develop ... performance validation.Identify and resolve design issues in collaboration with engineering ... teams.Participate in design reviews and contribute to ...
27 days ago
... PythonProficient in using industry-standard design software, including Cadence Virtuoso, ... Calibre DRC, LVS toolsExperience supporting design teams working with analog and ... digital design flowsExcellent communication skills and ability ...
7 days ago
... performance validation.Identify and resolve design issues in collaboration with engineering ... teams.Participate in design reviews and contribute to verification ... of FPGA, ASIC, and RTL design.Hands-on experience with SystemVerilog ...
26 days ago
Description: Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core ...
26 days ago
... looking for a AI Engineer for our client in Santa ... CA Job Title: AI Engineer Job Location: Santa Clara ... - $65hrThe Generative AI Design Engineer will design, develop, and optimize generative ... as content creation, product design, intelligent automation, and ...
17 hours ago
Description: Role: GenDesign / Inverse Design Ai Engineer Location: Santa Clara, CA Must ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ...
20 hours ago
Description: Title: GenDesign / Inverse Design Ai Engineer Location: Santa Clara, CA-Onsite ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation. Develop forward ...
3 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
13 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
14 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
15 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
18 days ago
... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and ... have a strong background in design debugging and a deep familiarity ... deliverables. Key Responsibilities: Design and develop RTL for
26 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
26 days ago
... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation.Develop forward ...
3 days ago
... are looking for DFT / ATPG Engineer for our client in Santa ... , CA Job Title: DFT / ATPG Engineer Job Location: Santa Clara, CA ... : Pay Range: $82hr - $103hrThe DFT Design Engineer will be part of the ... DFT design team responsible for scan/ATPG ...
20 days ago
... motivated and skilled FPGA Verification Engineer to join our dynamic team ... the verification of complex FPGA designs, ensuring their functionality, performance, and ... . You will work closely with design engineers to develop and execute verification ...
10 days ago
Description: FPGA Verification Engineer Day1 Onsite (Santa ... and skilled FPGA Verification Engineer to join our dynamic ... verification of complex FPGA designs, ensuring their functionality, ... will work closely with design engineers to develop and execute ...
13 days ago