Description: Job Title: SoC Lead Engineer Location: San Jose, CA Company: ... Experience: 5 8 years Key Responsibilities: Define SoC architecture and microarchitecture for multi ... /v9, AMBA protocols, Verilog/SystemVerilog.SoC int
17 days ago
Description: Overview: Responsibilities: The QA Lead Engineer will be responsible for managing ...
22 days ago
Description: Job Title: RTL Engineer: Integrate RISC-V Core to SoC Location(s): Santa Clara ... of experience in RTL design, SoC integration, or related areas.Strong ... , NC, Verilator).Deep understanding of SoC design, integration, and high-performance ...
29 days ago
Description: Title: RTL Engineer Location: Santa Clara, CA (Day-1 ... Role: Integrate RISC-V Core to SoC Key Responsibilities Integrate RISC-V CPU ... cores into SoC designs, collaborating with cross-functional ...
10 days ago
Description: Role: Analog Layout Design Engineer Location: Santa Clara, CA Emp ... CMOS FinFET technologies for ASIC/SOC level
8 days ago
Description: Job Title: Design Verification Engineer Location: Sunnyvale CA /Redmond WA/ ... verification environments for IP/subsystem/SoC level testing Develop directed and ...
8 days ago
... Title: Power & Performance (PnP) Validation Engineer Location: San Jose, CA Company ... Key Responsibilities: Validate ARM-based SoC designs focusing on power, performance ...
11 days ago
Description: Role: Software Embedded Firmware Engineer Location: Goleta, CA Onsite Job ... Software (SW) Design EngineerFPGA and SOC Firmware DevelopmentCamera Firmware DevelopmentPort/Adapt ...
14 days ago
Description: Position: Senior Design Verification Engineer Location: Mountainview, California Experience: 7 to ... : Strong expertise along-with complex SoC/IP debug is mustAt-least ...
17 days ago
Description: Position: Senior Design Verification Engineer Location: Mountainview, California (Complete onsite) ... : Strong expertise along-with complex SoC/IP debug is mustAt-least ...
20 days ago
Description: Position: Senior ASIC Design Engineer Emulation(HAPS Engineer) Location: San Jose, CA ... Doing: Map multi-million gate SoC designs onto prototyping platforms, creating ...
20 days ago
... IP/sub-system and/or SoC level verification based on SystemVerilog ...
21 days ago
Description: Position: 1- Firmware Engineer C, C++ microcontrollers, UART, I2C, SPI, USB, SoC, RTOS, Microcontrollers, Debugging ... , IoT Development, Hardware Integration. position: 2- Validation Engineer VHDL ...
23 days ago
... : Position Role/Tile: UKG Test lead Contract: 06 - 12 months Contract ... Responsibilities: As a Quality Engineering Lead (UKG Test Lead), you will be responsible ... for leading a team of quality engineers ...
10 days ago
... : Position Role/Tile: UKG Test lead Contract: 06 - 12 months Contract ... Responsibilities: As a Quality Engineering Lead (UKG Test Lead), you will be responsible ... for leading a team of quality engineers ...
15 days ago
... : Position Role/Tile: UKG Test lead Contract: 06 - 12 months Contract ... Responsibilities: As a Quality Engineering Lead (UKG Test Lead), you will be responsible ... for leading a team of quality engineers ...
21 days ago
... : Position Role/Tile: UKG Test lead Contract: 06 - 12 months Contract ... Responsibilities: As a Quality Engineering Lead (UKG Test Lead), you will be responsible ... for leading a team of quality engineers ...
28 days ago
... : Position Role/Tile: UKG Test lead Contract: 06 - 12 months Contract ... Responsibilities: As a Quality Engineering Lead (UKG Test Lead), you will be responsible ... for leading a team of quality engineers ...
29 days ago
... : Position: Contract Manufacturing Onsite Team Lead Location: San Jose, CA(Oniste ... a highly skilled Senior Validation Engineer to lead the testing and validation of ...
11 days ago
Description: Lead Software Engineer - Long Term Project - Remote but ... based in LA/SF/SeattleTitle: Lead Software Engineer Location: Remote but locally ... Work in the U.S. As a Lead Software Engineer of our team, you will ...
2 days ago