Description: Role: Design Verification Engineer Work Location: Santa Clara, CA ... 7+ years of experience in pre-silicon design verification Proficiency in C-shell scripting ... functional code coverage. SOC Verification experience using ARM Cortex Microcontroller ...
19 days ago
... : We are looking for Design Verification Engineer for our client in Sunnyvale ... , CA Job Title: Design Verification Engineer Job Location: Sunnyvale, CA Job ... from test planning to closing verification using coverage metrics.Involves test ...
19 days ago
... Job Description: As a Verification Engineer, you will own functional verification for a custom controller ... You will develop functional verification infrastructure to ensure functional correctness ... the throughput of the verification effort.In this role, ...
19 days ago
Description: Title: Software Verification Engineer II - Onsite Mandatory skills: Python ...
25 days ago
... a primary job functionExperience with verification of designs written in VHDLExperience ... writing TCL to control verification toolsDemonstrated ability in root- ... designers to collaboratively resolve verification test failuresExperience with Git ...
11 hours ago
Description: Title : Software Verification EngineerLocation: Palo Alto, CA (Onsite ... have : Python ,C#Medical Device Software Verification Tester to join our team ...
6 days ago
Description: DivIHN (pronounced divine ) is a CMMI ML3-certified Technology and Talent solutions firm. Driven by a unique Purpose, Culture, and Value Delivery Model, we enable meaningful connections between talented professionals and forward-thinking ...
23 days ago
Description: Role : ATE Engineer Location : Bay Area , CA onsite ... program development, ATE Testing and Silicon Qualification Define / Test Plan for ... the ATE Testing and Silicon Qualification Develop Test program for ...
25 days ago
... or scientific use. A typical hardware engineer is responsible for the manufacture ... tools and techniques for post-silicon coverage analysis. Execute coverage collection ... on pre-silicon simulation and emulation platforms. Comprehend ...
26 days ago
Description: Title: ASIC/RTL Design Engineer - Senior - Hybrid Mandatory skills: ASIC ... documentationPower saving techniques, technical information, silicon, logic functions Description: KEY RESPONSIBILITIES ...
9 hours ago
Description: Title: Electrical Engineer 5Location: Silicon Valley, CA(onsite)Contract:6+ Month ...
25 days ago
... a primary job function Experience with verification of designs written in VHDL ... Experience writing TCL to control verification tools Demonstrated ability in root ... RTL designers to collaboratively resolve verification test failures Experience with Git ...
7 hours ago
... : EM/IR Expert (Physical Design Verification) Location: Sunnyvale, CA (Onsite) Duration ... EM/IR Expert (Physical Design Verification) role with strong experience on ...
27 days ago
... looking for Research and Development Engineer for our client in Brea ... Job Title: Research and Development Engineer Job Location: Brea, CA Job ... understanding and adherence.Supporting Design Verification strategy development.Supporting Design Validation ...
12 days ago
... : Role Title: ASIC/RTL Design Engineer - Senior Location: San Jose, CA ... understand the requirements. Work with verification and physical design teams to ...
4 hours ago
Description: Job Title: CAD Design Engineer Location: San Diego Duration: 11 ... cross-functional teams to analyze verification tool and flow issues, develop ...
13 days ago
... immediately hiring for a(n) FPGA ASIC Verification Engineer Position type: Contract. Duration: 6 months ... FPGA, ASIC, Verification, UVM, SystemVerilog As a(n) FPGA ASIC Verification Engineer you will: Minimum ...
19 days ago