Description:
Job Description: Minimum Qualifications Track record of 'first-pass success' in ASIC development cycles.Bachelor s degree in computer science, Computer Engineering, relevant technical field, or equivalent practical experience.8 to 10 years of hands-on experience in System Verilog/UVM methodologyExperience in one or more of the following areas along with functional verification-SV Assertions, Formal, Emulation.Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools an
Nov 4, 2025;
from:
dice.com