Description: Job Title : Exterior Design release Engineer Location : Irvine, CA (Onsite Opportunity) ...
22 days ago
Description: Job Title: Exterior Design release Engineer Location: Irvine, CA (Onsite) Duration: ...
24 days ago
... : The project relates to the design and verification of a custom controller for ... Experience: 6+ years of experience with verification methodologies
16 days ago
... knowledge of custom HW design to plan for Verification testing. Experience in ...
11 days ago
... a project team of engineers involved in the specification, design, development, and test ... engineer will work closely with hardware design engineers, software/diagnostic engineers, and manufacturing test engineers ...
17 days ago
... Senior Analog IC Design Engineer to join its Bufferchip Design team in Agoura ... role, the Senior Analog IC Design Engineer will report to the Senior ... role in product definition and design. The position offers hig
21 days ago
Description: (hands-on and AXI experience).Should be good in hands-on using SV/UVM.AMBA (especially AXI is a must)Experience in updating sequence, test, running and debuggingExperience in PCIE or C based is a plus
18 days ago
... seeking a Low Power Principal Engineer/ASIC Engineer to join our team in ... CA! Key Responsibilities: - Low power design and verification (UPF, VCLP) - Power analysis ... of experience in ASIC design, low power design, and verification - Proficiency in scripting ...
16 days ago
Description: Role : EDVT Engineer Location: San Jose, CA (Onsite ... expr , in Hardware Testing with Verification expr. With Python and pearl ...
21 days ago
... in Formal VerificationExperience with Formal Verification applications including Datapath, sequential equivalence ... , connectivity etcProven understanding of Formal Verification methodologies, complexity reduction techniques and ...
15 days ago
... -million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds ... engage in block-level RTL design or block or top-level ... integration.Collaborate with Software, Design, and Verification teams to validate the functional ...
9 days ago
Description: Position: 1- Firmware Engineer C, C++ microcontrollers, UART, I2C, ... Engineer VHDL, Verilog, Hardware Description Languages (HDL), UVM (Universal Verification ... Methodology) and OVM (Open Verification Methodology), DSP, ...
16 days ago
Description: Title: RTL Engineer Location: Santa Clara, CA (Day-1 ... -functional teams (DV, physical design, architecture, verification, and post-silicon validation) to ...
3 days ago
... , FPGA design, emulation and HAPS experiences must. Experience in complete verification cycle ...
a day ago
Description: Title: Systems Engineer Location: Pleasanton, CA 94588 Duration ... YOU LL DO The Systems Engineer (Contract) will be accountable ... responsibilities include systems integration, formal verification, following design change control process, including ...
3 days ago
Description: Job Title: SoC Lead Engineer Location: San Jose, CA Company: ... , GIC) and design clock/reset architectures.Collaborate with verification teams for test ...
10 days ago
Description: Role: FPGA Validation Engineer Location: Santa Clara, CA (Onsite) 5 ... . Deep understanding of digital logic design and computer architecture FPGA simulation ... (e.g., DDR, HDMI, PCIe, Ethernet). FPGA verification methodologies Test case coding in ...
14 days ago
... and verification methodsCollaborate with vendors to troubleshoot performance issues and drive design ...
17 days ago
... Chip-Level Timing Constraint Development Engineer Location: San Jose, CA ... Chip-Level Timing Constraint Development Engineer, you will be responsible for ... including RTL designers, physical design engineers, and verification teams, to ensure robust timing ...
29 days ago
... Title: Power & Performance (PnP) Validation Engineer Location: San Jose, CA Company ... Responsibilities: Validate ARM-based SoC designs focusing on power, performance, and ... test cases for RTL/firmware verification in ASIC/FPGA environments.Key ...
4 days ago