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Jobs and careers for asic verification engineer in Santa Clara (11 jobs)

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Description: Role: Design Verification Engineer Location: Santa Clara, CA Interview: ... /C/C++ Responsibilities: Architect and Create verification environments using System-Verilog and ... Universal verification methodology-UVM IPs and ...
14 days ago
  • Johnson & Johnson
  • Santa Clara
... companies, is recruiting for a Systems Verification Engineer , located in Santa Clara, CA ...
20 days ago
  • Johnson & Johnson
  • Santa Clara
... , is recruiting for a Senior Systems Verification Engineer located in Santa Clara, California ...
27 days ago
  • EITAcies, Inc.
  • Santa Clara
... is for a Sr. Failure Analysis Engineer. (On-Site 5 days/week) Primary ...
11 hours ago
Description: Summary Imagine what you could do here. At Apple, phenomenal ideas have a way of becoming phenomenal products, services, and customer experiences very quickly. Apple is owning the charge in dedication mobile computing with innovative SOC's ...
8 days ago
  • Qualcomm Technologies
  • Santa Clara
... Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading ... future for all. As a Qualcomm ASIC Engineer, you will define, model, design ...
18 days ago
  • Qualcomm Technologies
  • Santa Clara
... , Engineering Group > ASICS Engineering General Summary: A SOC Physical Design Engineer plays a crucial ... synthesis, power optimization, and physical verification methodologies. Additionally, communication ski
6 days ago
  • Intellectt INC
  • Santa Clara
Description: Analog Layout Engineer Location: Santa Clara, CA ... Skill Requirement: 5- 10yrs Exp range engineers Required Port schematics from the ... Design Review Guide layout engineer to implement the layout ... Review Complete all necessary verification checks and
11 days ago
  • VIVA USA INC
  • Santa Clara
... : Silicon Design Engineer - Onsite Description: SENIOR SILICON DESIGN ENGINEER THE ROLE: This ... , Place n Route, timing, and Physical Verification THE PERSON: Strong communication skills ... spread-out teams RESPONSIBILTIES: This engineer will work on high-speed ...
19 days ago
  • Sierra Business Solution LLC
  • Santa Clara
Description: Role : Post Silicon Validation Engineer Location : Santa Clara, CA -onsite ... , C/C++, System Verilog Pre-silicon design verification & testbench Post-silicon validation on ...
15 hours ago
  • Johnson & Johnson
  • Santa Clara
... Signal Integrity Engineer focusing on SI, PI design, and verification located in ... a diverse group of highly motivated engineers who are passionate about designing ...
13 days ago