Description: Job Title: Design Verification Engineer Duration: Full time or Contract ... end-to-end solutions for ASIC/FPGA Design both in Digital ... Design & Implementation, Functional Verification, Physical Design, AMS Verification, Layout Design, and circuit ...
3 days ago
Description: Role: Design Verification Engineer Work Location: San Francisco, CA - ... of 'first-pass success' in ASIC development cycles. Bachelor's degree in ... Experience in ARM Based SoC verification Experience with AXI/AHB/APB ...
30 days ago
Description: Sr Verification Engineer VCS Distributed Simulation & Multi-Chip Verification Looking for a Senior Verification Engineer with ... expertise in VCS distributed simulation and multi-chip verification. You ...
23 days ago
... Description: Design Verification Engineer - CPU Subsystem Looking for a Design Verification Engineer to play ... UVM, with a focus on developing verification environments, executing test plans, & ... , UVC development, & verification of complex protocols like ...
4 days ago
... AI HW Design Verification Engineer Looking for a Senior Design Verification Engineer. This person ... digital designs through comprehensive verification methodologies. This person should ... a strong background in verification techniques/processes, problem solving ...
24 days ago
Description: FW Verification Engineer The RISC-V CPU team owns ... , emulation, & silicon. Scope: Define FW verification strategy, considering design maturity, cost ... -benefit analysis of different verification platforms, & dev costs. Create a ...
29 days ago
Description: Title: Staff Verification Engineer Location: Santa Clara, CA (onsite/ ... : Collaborate with architects, hardware engineers, and firmware engineers to understand the new ...
30 days ago
... resumes to Job Title: Lead Engineer - AI and FPGA Integration Expert ...
5 days ago
Description: Design Verification CPU Core & Block Looking for a ... feature/test plan verification engineer responsible for ISA & microarchitectural verification. This will be ... Santa Clara, CA. Scope: Functional verification with emphasis on core level ...
4 days ago
... are looking for Senior ASIC/RTL Design Engineer for our client in ... San Jose, CA Job Title: Senior ASIC ... /RTL Design Engineer Job Location: San Jose ...
17 days ago
Description: Job Title: ASIC/RTL Design Engineer Primary Skills : RTL coding, TCL ...
17 days ago
... (QC) quality checking and basic verification of designs. Experience supporting SoC ...
5 days ago
... experience in Vehicle bring up, Verification and Validation test at large ...
17 days ago
... resume. Role: Post Silicon Validation Engineer Ethernet Location: (ONSITE) Santa Clara ... : Works for ethernet validation.Hardware verification checks the actual devices/chips ...
19 days ago
... DL Role: Post Silicon Validation Engineer (w/Strong Ethernet) Location: Santa Clara ... : Works for ethernet validation. Hardware verification, checks the actual devices/chips ...
22 days ago