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Jobs and careers for soc verification engineer in Sunnyvale (4 jobs)

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Design Verification Engineer at Sunnyvale CA /Redmond WA/ Austin TX(Hybrid)

  • Aptiva Corp
  • Sunnyvale
Description: Job Title: Design Verification Engineer Location: Sunnyvale CA /Redmond WA/ ... /System Verilog-based verification environments for IP/subsystem/SoC level testing Develop ...
8 days ago

Verification Engineer IV

  • SPECTRAFORCE TECHNOLOGIES Inc.
  • Sunnyvale
Description: Verification Engineer IV Sunnyvale CA (Hybrid) 6 months ( ... : The main function of the Verification Engineer is to work with a group ... researchers and engineers to own the electrical system level verification of Client ...
a month ago

Design Verification Engineer

  • Veear
  • Sunnyvale
... verification and UVM methodology.Experience in IP/sub-system and/or SoC ... level verification based on SystemVerilog UVM ... following areas along with functional verification - SV Assertions, Formal, Emulation.Experience ...
21 days ago

ASIC Engineer, Formal Verification

  • Veear
  • Sunnyvale
... in Formal VerificationExperience with Formal Verification applications including Datapath, sequential equivalence ... , connectivity etcProven understanding of Formal Verification methodologies, complexity reduction techniques and ...
21 days ago
Verification Engineer IV Design Verification Engineer

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